1. Field of the Invention
The present invention pertains to shuttering of electronic cameras, and more particularly, to the shuttering of image sensing semiconductors contained on electronic cameras.
2. Description of the Prior Art
Electronic shuttering of a CCD sensor is, typically, accomplished by applying a voltage pulse to the substrate of a sensor that has a vertical overflow anti-blooming feature. The voltage required for shuttering can be as much as 40 volts, typically requiring the addition of a large number of discrete components with the resulting assembly time.
Numerous devices within the prior art have addressed electronic shuttering techniques for image sensing devices. Various devices have addressed controlled shutter pulse generation, vertical overflow drains and electronic shutters for charge coupled imagers.
More specifically, U.S. Pat. No 5,181,101 issued to K. Oda (hereafter referred to as Oda) discloses an "Image Sensing Apparatus" which combines two voltages to create a shutter function potential. While Oda may teach an adder employed to combine two potentials into a larger shutter potential, no disclosure is made towards a method or apparatus that is capable of generating a shutter potential on the same semiconductor chip as the CCD.
U.S. Pat. 4,875,100 issued to Yonemoto et al, (hereinafter referred to as Yonemoto) discloses an "Electronic Shutter For A CCD Image Sensor" that teaches an electronic shutter function for video cameras to enable shuttering without the use of mechanical shutters. However Yonemoto does teach a concept of an on chip electronic shutter, and more specifically, does not disclose the use of a voltage multiplier to create a shutter potential.
An "Integrated Electronic Shutter" for charge coupled devices was disclosed in U.S. Pat. No. 5,270,558 issued to Reich et al (hereinafter referred to as Reich) taught a device used for integrating the electronic shutter elements on to an CCD imager. However, disclosure was only made of drain regions for the purposes of shuttering and no disclosure was made of on chip voltage multipliers used as an electronic shutter.
As can be seen by the foregoing discussion, there remains a need within the prior art for a method and apparatus that teaches on chip shuttering techniques in a manner that can be used easily and economically. Such a method and apparatus are disclosed by the voltage multiplier techniques of the present invention. The present invention eliminates all circuits external to the sensor chip and uses only a 5 volt control pulse from the system timing controller.